1 ps8380a 07/17/00 1 2 3 y1 4 y0 clk_in gnd gnd 8 7 6 5 16 15 14 13 9 10 11 12 agnd v cc av cc fb_out g y3 v cc fb_in gnd v cc y2 product pin configuration functional table logic block diagram 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1 2345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012 12345678901 2 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 pi6c2504 phase-locked loop clock driver with 4 clock outputs product description the pi6c2504 features a low-skew, low-jitter, phase-locked loop (pll) clock driver, distributing high-frequency clock signals for sdram and server applications. by connecting the feedback fb_out output to the feedback fb_in input, the propagation delay from the clk_in input to any clock output will be nearly zero. product features high-performance phase-locked-loop clock distribution for networking registered dimm synchronous dram modules for server/workstation/pc applications allows clock input to have spread spectrum modulation for emi reduction zero input-to-output delay low jitter: cycle-to-cycle jitter 100ps max. on-chip series damping resistor at clock output drivers for low noise and emi reduction operates at 3.3v v cc wide range of clock frequencies up to 80 mhz package: plastic 16-pin qsop package (q) s t u p n is t u p t u o g] 3 : 0 [ yt u o _ b f ll n i _ k l c hn i _ k l cn i _ k l c 16-pin q clk_in fb_in pll av cc fb_out y[0:3] 4 g
2 ps8380a 07/17/00 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 pi6c2504 phase-locked loop clock driver with 4 clock outputs recommended operating conditions l o b m y sr e t e m a r a p. n i m. x a ms t i n u v c c e g a t l o v y l p p u s0 . 36 . 3 v v h i e g a t l o v t u p n i l e v e l h g i h0 . 2 v l i e g a t l o v t u p n i l e v e l w o l 8 . 0 v i e g a t l o v t u p n i0v c c t a e r u t a r e p m e t r i a - e e r f g n i t a r e p o00 7c o pin functions e m a n n i p. o n n i pe p y tn o i t p i r c s e d n i _ k l c6 1i . t u p n i k c o l c e c n e r e f e rn i _ k l c. t u p n i k c o l c m u r t c e p s d a e r p s s w o l l a n i _ b f9ie e f. t u p n i k c a b dn i _ b fd i v o r p. l l p l a n r e t n i e h t o t l a n g i s k c a b d e e f e h t s e g7i . e t a t s w o l c i g o l a o t d e l b a s i d e r a ] 3 : 0 [ y s t u p t u o , w o l s i g n e h w . e l b a n e k n a b t u p t u o t u o _ b f8o f. t u p t u o k c a b d e et u o _ b fi d e d s i. k c a b d e e f l a n r e t x e r o f d e t a ct u o _ b fd e d d e b m e n a s a h . x y s t u p t u o k c o l c e h t s a e u l a v e m a s e h t f o r o t s i s e r g n i p m a d - s e i r e s ] 3 : 0 [ y2 1 , 1 1 , 4 , 3o f o s e i p o c w e k s - w o l e d i v o r p s t u p t u o e s e h t . s t u p t u o k c o l cn i _ k l c . r o t s i s e r g n i p m a d - s e i r e s d e d d e b m e n a s a h t u p t u o h c a e v a c c 5 1r e w o p v a , s e s o p r u p t s e t r o f . y l p p u s r e w o p g o l a n a c c n e h w . l l p e h t s s a p y b o t d e s u o s l a e b n a c v a c c d n a d e s s a p y b s i l l p , d n u o r g o t d e p p a r t s s in i _ k l ce c i v e d e h t o t y l t c e r i d d e r e f f u b s i . s t u p t u o d n g a1d n u o r g . y r t i u c r i c g o l a n a e h t r o f e c n e r e f e r d n u o r g e h t s e d i v o r p d n g a . d n u o r g g o l a n a v c c 0 1 , 6 , 2r e w o p. y l p p u s r e w o p d n g4 1 , 3 1 , 5d n u o r gd n u o r g l o b m y sr e t e m a r a p. n i m. x a ms t i n u v i e g n a r e g a t l o v t u p n i 5 . 0 ?v c c 5 . 0 +v v o e g n a r e g a t l o v t u p t u o i c d _ o t n e r r u c t u p t u o c d 0 0 1a m r e w o pt t a n o i t a p i s s i d r e w o p m u m i x a m a 5 5 = o r i a l l i t s n i c0 . 1w t g t s e r u t a r e p m e t e g a r o t s5 6 ?0 5 1 o c dc specifications (absolute maximum ratings over operating free-air temperature range) r e t e m a r a ps n o i t i d n o c t s e tv c c . n i m. p y t. x a ms t i n u i c c v i v = c c i ; d n g r o o 0 = ) 1 ( v 6 . 30 1 m a c i v i v = c c d n g r o v 3 . 3 4 f p c o v o v = c c d n g r o6 n ote: stress beyond those listed under ?absolute maximum ratings? may cause permanent damage to the device. note: 1. continuous output current
pi6c2504 phase-locked loop clock driver with 4 clock outputs 3 ps8380a 07/17/00 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 ac specifications timing requirements over recommended ranges of supply voltage and operating free-air temperature l o b m y sr e t e m a r a p. n i m. x a ms t i n u f k l c y c n e u q e r f k c o l c5 20 8z h m d cyi e l c y c y t u d k c o l c t u p n i0 40 6% p u r e w o p r e t f a e m i t n o i t a z i l i b a t s1s m r e t e m a r a p) t u p n i ( m o r f) t u p t u o ( o t v c c c 0 7 - 0 , v 3 . 0 v 3 . 3 = s t i n u . n i m. p y t. x a m r e t t i j t u o h t i w r o r r e e s a h p t n i _ k l c - z h m 6 6 d n a z h m 0 0 1 t a n i _ b f - 0 5 1 ?0 5 1 + s p e l c y c - o t - e l c y c , r e t t i jz h m 6 6 d n a z h m 0 0 1 t at u o _ b f r o y y n a0 0 1 ?0 0 1 + z h m 6 6 d n a z h m 0 0 1 t a , w e k st u o _ b f r o y y n a0 0 2 e l c y c y t u d 5 45 5% v 0 . 2 o t v 4 . 0 , e m i t - e s i r , r t 0 . 1 s n v 4 . 0 o t v 0 . 2 , e m i t - l l a f , f t 1 . 1 switching characteristics (over recommended ranges of supply voltage and operating free-air temperature, cl=30pf) note: these switching parameters are guaranteed by design. electrical characteristics (over recommended operating free-air temperature range pull up/down currents, v cc = 3.0v) l o b m y sr e t e m a r a pn o i t i d n o c. n i m. x a ms t i n u i h o t n e r r u c p u - l l u p v t u o v 4 . 2 = - 8 1 a m v t u o v 0 . 2 = - 0 3 i l o t n e r r u c n w o d - l l u p v t u o v 8 . 0 =5 2 v t u o v 5 5 . 0 =7 1
4 ps8380a 07/17/00 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 pi6c2504 phase-locked loop clock driver with 4 clock outputs e d o c g n i r e d r oe m a n e g a k c a pe p y t e g a k c a pe g n a r g n i t a r e p o q 4 0 5 2 c 6 i p6 1 qp o s q n i p - 6 1l a i c r e m m o c ordering information pericom semiconductor corporation 2380 bering drive ? san jose, ca 95131 ? 1-800-435-2336 ? fax (408) 435-1100 ? http://www.pericom.com package mechanical information: 16-pin qsop package (q).
|
